Are you sure the controller is LVDS? It sure doesn't look like it. The odd/even designation on the controller spec may refer to it being a dual link transmitter. In dual link mode, 2 pixels are transmitted at once per clock over a second set of diff pairs. Yet the sheet says "pixel n" instead of 'channel n' or 'pair n' like it should. It also shows a separate line for DE which is usually a bit that gets mapped in the LVDS clocking (along with 18-bit RGB, H Sync, V Sync = the 21 clocking bits for 3x7 channel LVDS - with the 4th channel carrying the 2 LSBs for 24-bit RGB color).
Something looks a-miss. Do you have a full spec sheet for the transmitter?