, or maybe ( ie, about me having to look up & download data....)
And this info is very tentative - my anal-ysis may be flawed. (I'm out of anal practice!)
From the full ATmega328 datasheet (doc8271.pdf; v.8271D–AVR–05/11, ATmega48A/PA/88A/PA/168A/PA/328/P):..
It looks as if input pins have an impedance of 36k (ie, 140uA @ 5V). [ Ref: eg - p517, Figure 30-346. ATmega328P: I/O Pin Pull-up Resistor Current vs. Input Voltage (VCC = 5 V) or for any other supply voltage ]
At 5V, input high is above 2.6V ...[ p521, Figure 30-354. ATmega328P: I/O Pin Input Threshold Voltage vs. VCC (VIH, I/O Pin read as ‘1’) ]
At 5V, input low is below 2.1V ...[ p521, Figure 30-355. ATmega328P: I/O Pin Input Threshold Voltage vs. VCC (VIL, I/O Pin read as ‘0’) ]
So lets call that a 2V margin or offset from either rail (supply) - ie, low is <2V, and high is >3V (its Vcc or supply voltage of 5V less the 2V margin).
The point being that a hi or low doesn't have to be +5V or 0V (GND) - it just has to be within 2V of whatever rail.
FYI - the supply voltage does not matter since this boils down to resistance ratios between 2 rails.
If that doesn't make sense, just trust me for now, or realise that high & low are simply above & below the mid-rail voltage (eg, 2.5V for a 5V supply; 0.9V for a 1.8V supply) with a bit of gap aka hysteresis in between.
Else see the how the logic-level thresholds are close enough to half the Vcc/supply voltage in those Input Threshold Voltage graphs. Ha - I love saying it - CPUs are designed logically ( pun).
Hence a pull up resistor should pull up to around at least 3V or 3/5ths of the rail.
If the input is like a 36k resistor to ground, that means no greater than a 33k pull up resistor which is just borderline, I'd probably choose a 27k resistor.
[ FYI - it's a voltage divider. Its "output" voltage will be 5V x 36/(33+36) = 5x36/69 = 5x0.71 = 2.6V which happens to be the minimum voltage for a "guaranteed" high. Using 27k makes it 2.85V and overcomes and resistor tolerance (ie, accuracy, 10%, 5%, 2% etc - a 27k resistor is usually 27k +/-5% etc.) ]
Oh well, so much for my earlier comment that a 100k resistor should or might be ok....
The input "drain" with a 27k pull up should be 5V/(27k+36k) = 0.08mA, else 5V/27k = 0.2mA if the pin is effectively at 0V (maybe as an output pin, or because I don't know or understand the circuit technicalities!).
BTW, of note in the ATmega spec is (pp81-82):
14.2.6 Unconnected Pins... but maybe that is looked after by the Arduino firmware...?
If some pins are unused, it is recommended to ensure that these pins have a defined level.
Even though most of the digital inputs are disabled in the deep sleep modes as described above, floating inputs should be avoided to reduce current consumption in all other modes where the digital inputs are enabled (Reset, Active mode and Idle mode).
The simplest method to ensure a defined level of an unused pin, is to enable the internal pull-up.
In this case, the pull-up will be disabled during reset.
If low power consumption during reset is important, it is recommended to use an external pull-up or pull-down.
Connecting unused pins directly to VCC or GND is not recommended, since this may cause excessive currents if the pin is accidentally configured as an output.
Now the question is if there is added circuitry between the Atmega CPU pins and the Aduino's extra pins that impact the above.
But I'd have to look up the Uno schematic for that. And enough is enough!! (Well, for today at least. It's now 2:40AM Zulu.)