BTW, Mike Carr, whose name is credited on this circuit, didn't design it. He admitted to me that he stole it from someone else.
Whether you will drain too much current depends on your system and how long you plan to leave it in hibernate.
Has anyone checked the power drain on a DC-DC power supply when the computer is in hibernate? I think it would only keep current to the CMOS chipset and WOL/WON (if enabled).
I wonder if it would be feasible(sp?) to wire a DC-DC power supply and make a relay setup that hits the button when key is turned on and then again when the key is turned off (pulling the system from hibernate and then sending it back).
If it isn't too much drain, it might be just like having the constant to a car stereo for retention of the time and user presets.
Any ideas?
BTW, Mike Carr, whose name is credited on this circuit, didn't design it. He admitted to me that he stole it from someone else.
Whether you will drain too much current depends on your system and how long you plan to leave it in hibernate.
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