Thread: How do voltage regulators track when the input voltage drops too low?

Originally Posted by Arathranar

Let's say a 12V regulator with a voltage drop of 0.5V. What will the output be at 12.5V; 12.0V; 11.5V & 11.0V? Will it stay 0.5V below the input voltage or will the drop reduce or even disappear the lower the input voltage?

With respect to linear voltage regulators (such as a 7812), they have what they call a "dropout". Dropout is the minimum amout of voltage the device will drop. So if you have a 12V reg with 2V of dropout, then you need 14V at the input. Anything less will result in a undervoltage output.

The actual dropout will vary with the amount of current you are pulling thru the regulator, but it is typically 1 - 2V (been a while since I looked at a vreg datasheet) for a standard vreg.

"Low Dropout" regulators tend to have about 300 - 500 mV of dropout.

Typically, the dropout is fairly constant (at a particular current) once you have an undervoltage situation. So if you feed 10V into a 12V regulator with a .5V dropout, your output should be 9.5V.

as i understand it if the input voltage is 12.5v or greater the output voltage will be 12v, however if the input is less than 12.5v the output voltage will be the input voltage minus .5v, but someone correct me if i'm wrong?

That's what I would expect but I've seen graphs on spec sheets that seem to imply the dropout voltage tends to zero in under voltage scenarios.

Here's such a graph:
http://rocky.digikey.com/WebLib/Shar...a/pq05rd21.pdf

The dropout is fixed for all voltages (varies slightly with temp/current) because of the way the vreg is made. Its basically a small circuit with a transistor. All transistors have a fixed minimum voltage drop, add that to the other circuitry then you would have the total dropout.

I've also measured this with a dead 9V battery going into a 5V regulator. I measured 5V on the input and about 3.2 V on the output. 1.8V dropout.

Looks like you are somewhat correct. At least for LDO (low drop out) regulators, but it is load dependent.

Looks like LDOs use MOSFET technology instead of older transistor technology, the dropout is based on the on-resistance of the FET. So with RL being infinite, zero current to the load, zero dropout.

For other load values, as the voltage drops on the load, so does the current, so it appears that the dropout is approaching zero, but its not really true - the dropout is getting less because the current is getting less.

From what I can tell, the dropout on an LDO is the same at all voltages for a fixed current.

That sounds very plausible.