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Progress report + help needed
This is my progress report :
1) I managed to get another pair of M/F mini-iso connectors.
You can get them too by ordering a Blaupunkt 1.3m extender, ref 7 607 621 154.
I got it here in Brussels (at Arwac's) for 16 EUR, which is quite reasonable.
I wouldn't advise using the extender as is though, because the pins are assigned
differently in Blaupunkt head units, and shielding is absolutely not suitable for the
pin assignment of Renault. But for the connectors alone, it's perfectly OK.
2) Before spying with the above circuit, I thought it would be interesting to "see"
what travels on the wires. So I built myself a "4 resistor oscilloscope"
(2 resistors 470k/10k divide the voltage by about 50, and then the signal is fed to
my sound card (Rx on right channel and Tx on left channel) and sampled at 44.1 kHz.
3) The first samples (see for example the attached gif file) are rather encouraging.
Here are some elements I observed or concluded, but I might be wrong so please
bear with me and tell me if I'm wrong :
- Rx on the pinout diagram actually is "Receive" from the point of view of the head unit.
This wire carries data from the CD changer to the head unit
- Conversely, Tx carries data from the head unit to the CD changer.
- Every second, the CD changer sends a burst of data to the head unit, even if listening
to the radio, not a CD (probably a mandatory "I'm alive" message so that the head unit
knows a CD changer is attached)
- The head unit always replies with an ACK (see second attached gif)
- The width of a bit seems to be a around 4.5 samples at 44.1kHz, or 4.5/44100 seconds,
which translates to a data rate of around 44100/4.5 = 9800 bps. => 9600 bauds actually
- In the long GIF, if you start at the middle of the first bit and count alternatively 4 and
5 bits and take note of each value (0 or 1), you get a long bit sequence like this (I may
have taken another sample than the gif one so you might have slightly different results
- which would be interesting to compare) :
10100001100100101100001001011110010001110110
10111111100101111111001111111111011111111110
11001001110111111111101111111111011111111110
111010011001111111111011110001010
and the acknowledge would be 10101110010
- Seeing this, I interpret it as :
1 start bit (1), 8 data bits (01000011), one parity bit (0) and one stop bit (0) and so on,
so cutting the stream like this :
1 01000011 0 0
1 00101100 0 0
1 00101111 0 0
1 00011101 1 0
1 01111111 0 0
1 01111111 0 0
1 11111111 1 0
1 11111111 1 0
1 10010011 1 0
1 11111111 1 0
1 11111111 1 0
1 11111111 1 0
1 11010011 0 0
1 11111111 1 0
1 11100010 1 0
and the ack goes :
1 01011100 1 0
All of the above have a start bit at 1, a stop bit at 0 and a "odd" partity bit :
the number of 1's in the 9 bits (data + parity) is always odd
I made a first attempt with the the above circuit with the MAX3232 (Spy mode) but
unfortunately I could only collect garbage.
Maybe I made a mistake somewhere in the circuit implementation, but can anyone confirm
the schema in question *should* work ?
Anyway, I hope I'll be able to do some more testing this week-end...
PS : Sorry for the extra wide gif :-(
Last edited by Vicne : 02-03-2006 at 05:07 PM.
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